Tensilica Xtensa LX4 Model

Description

Tensilica Xtensa 9 DPU

Tensilica's Xtensa 9 DPU (dataplane processing unit) is a small, ultra-low-power controller built on Tensilica's unique Xtensa technology. It can easily be extended to out-perform any other embedded processor for a specific application using a combination of configurable options and custom instructions.

By embedding functionality right into the processor datapath itself, designers can use the Xtensa DPU to not only perform control functions, but also some of the finite state machine tasks that manage RTL blocks and some of the RTL functionality as well. This makes for a smaller, more efficient chip design, and it significantly reduces the verification challenges associated with new RTL designs.

This model is a performance optimized instruction set representation of the processor capable of operating in both cycle accurate and turbo modes. The model integrates directly into SoC Designer Plus virtual prototype environment. This enables designers to perform architectural analysis, performance optimization and pre-silicon software debug.