Tensilica Pif-AXI Model


Tensilica Xtensa ® Pif <-> AXI Bridges
Tensilica processors perform traditional main memory and system accesses on a Processor Interface (PIF) port. The PIF is a configurable, high-performance, multi-master interface definition that is easily bridged to third party buses and interconnects. Tensilica provides bus bridges to AHB-Lite and AXI. These bridges can be used to easily integrate a Tensilica processor into an existing system, or as a starting point for an alternate bus bridge development.