Arm Cortex A5 Model


Both the Cortex™-A5 MPCore and the Cortex™-A5 UPCore application-class processors are supported by a rich set of features and ARMv7 architectural functionality so as to deliver a high-performance and low-power solution across both application specific and general purpose designs.

SoC Designer
Cortex A5 Cycle Model
Description The Cortex A5 model is compiled directly from Arm's register transfer level (RTL) code and maintains 100% functional accuracy. The model integrates directly with Arm's SoC Designer virtual prototype. This enables designers to perform accurate architectural analysis, performance optimization and pre-silicon firmware debug.
Performance Analysis Kits
Revisions r0p0

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